REB Functional Tests
1.0
Testing suite for the WREB, GREB, and VST readout boards
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Suite of tests for the VST controller board. More...
Classes | |
class | VSTTest.JythonInterface |
Some hacky workarounds to clean up the limited communication with the Jython interface. More... | |
class | VSTTest.IdleCurrentConsumption |
Test for idle current consumption in the VST board. More... | |
class | VSTTest.ChannelTest |
Tests number of communicable channels available to the board. More... | |
class | VSTTest.ASPICcommsTest |
Tests that the board can communicate with the ASPICS. More... | |
class | VSTTest.PCKRails |
Tests the parallel clock rail performance. More... | |
class | VSTTest.SCKRails |
Tests the serial clock rail performance. More... | |
class | VSTTest.SCKRailsDiverging |
Test the serial clock rail performance with a diverging voltage pattern. More... | |
class | VSTTest.RGRails |
Tests the reset gate rail performance. More... | |
class | VSTTest.RGRailsDiverging |
Tests the reset gate rail performance with a diverging voltage pattern. More... | |
class | VSTTest.OGBias |
Tests the output gate performance. More... | |
class | VSTTest.ODBias |
Tests the output drain performance. More... | |
class | VSTTest.GDBias |
Tests the guard drain performance. More... | |
class | VSTTest.RDBias |
Tests the reset drain performance. More... | |
class | VSTTest.TemperatureLogging |
Requests temperature logs for REB0.Temp(1-6) and CCD since the test started from the board's database. More... | |
class | VSTTest.ParameterLogging |
Periodically records specified values over the course of the testing sequence. More... | |
class | VSTTest.ASPICNoise |
Measure noise distribution in ASPICs for the unclamped, clamped, and reset cases. More... | |
class | VSTTest.ASPICLogging |
Continuously measure noise distribution in ASPICs. More... | |
class | VSTTest.Summary |
Summary object containing the needed information for the cover page. More... | |
class | VSTTest.FunctionalTest |
Runs the functional testing suite. More... | |
class | VSTTest.GUI |
Dialog-based GUI for displaying test progress and navigating options. More... | |
Functions | |
def | VSTTest.resetSettings () |
Reset the board settings for use in between tests. More... | |
def | VSTTest.exitScript () |
Reset settings and exit. More... | |
def | VSTTest.readRails (railType, count=0, uBound=20, lBound=-20) |
Reads the upper and lower voltages for a rail type (RG, SClk, PClk) and rejects if nonsensible. More... | |
def | VSTTest.voltsToRailDAC (V, rf, ri) |
Given a voltage, return a pair of voltage, shift DAC values. More... | |
def | VSTTest.setRGRailVoltage (lowV, highV, rf=25.0, ri=10.0) |
Set the voltage for the RG rail system. More... | |
def | VSTTest.setSCKRailVoltage (lowV, highV, rf=25.0, ri=10.0) |
Set the voltage for the SCK rail system. More... | |
def | VSTTest.setPCKRailVoltage (lowV, highV, rf=25.0, ri=10.0) |
Set the voltage for the SCK rail system. More... | |
def | VSTTest.convert (value, type_) |
Converts a value to the specified type. More... | |
def | VSTTest.printv (string) |
Print if verbose is enabled. More... | |
Suite of tests for the VST controller board.
This program communicates directly with the Jython interpreter to manipulate the board, so it does not need to be loaded into the Jython exectuor.
External dependencies:
To run:
Tests are structured as classes with four required methods:
def VSTTest.convert | ( | value, | |
type_ | |||
) |
Converts a value to the specified type.
value | Value to be converted |
type_ | Type to convert to. |
def VSTTest.exitScript | ( | ) |
Reset settings and exit.
Usually catches ^C.
def VSTTest.printv | ( | string | ) |
Print if verbose is enabled.
def VSTTest.readRails | ( | railType, | |
count = 0 , |
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uBound = 20 , |
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lBound = -20 |
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) |
Reads the upper and lower voltages for a rail type (RG, SClk, PClk) and rejects if nonsensible.
railType | "RG", "SClk", or "PClk" - specifies the type of rail to read |
uBound | Upper bound on sensible voltage |
lBound | Lower bound on sensible voltage |
def VSTTest.resetSettings | ( | ) |
Reset the board settings for use in between tests.
def VSTTest.setPCKRailVoltage | ( | lowV, | |
highV, | |||
rf = 25.0 , |
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ri = 10.0 |
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) |
Set the voltage for the SCK rail system.
lowV | Desired lower rail voltage. |
highV | Desired upper rail voltage |
rf | Optional op-amp Rf, defaults to 49.9 Ohm. |
ri | Optional op-amp Ri, defaults to 20.0 Ohm. |
def VSTTest.setRGRailVoltage | ( | lowV, | |
highV, | |||
rf = 25.0 , |
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ri = 10.0 |
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) |
Set the voltage for the RG rail system.
lowV | Desired lower rail voltage. |
highV | Desired upper rail voltage |
rf | Optional op-amp Rf, defaults to 49.9 Ohm. |
ri | Optional op-amp Ri, defaults to 20.0 Ohm. |
def VSTTest.setSCKRailVoltage | ( | lowV, | |
highV, | |||
rf = 25.0 , |
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ri = 10.0 |
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) |
Set the voltage for the SCK rail system.
lowV | Desired lower rail voltage. |
highV | Desired upper rail voltage |
rf | Optional op-amp Rf, defaults to 49.9 Ohm. |
ri | Optional op-amp Ri, defaults to 20.0 Ohm. |
def VSTTest.voltsToRailDAC | ( | V, | |
rf, | |||
ri | |||
) |
Given a voltage, return a pair of voltage, shift DAC values.
V | Desired output voltage |
rf | Op-amp Rf |
ri | Op-amp Ri |